Design Logic Circuit

Translate a functional specification into a combinational logic circuit by defining inputs and outputs, deriving a minimal Boolean expression, mapping it to a gate-level schematic, optionally converting to a universal gate basis (NAND-only or NOR-only), and verifying correctness through exhaustive simulation against the original truth table.

When to Use

• Implementing a Boolean function as a physical or simulated gate network
• Designing standard combinational building blocks (adders, multiplexers, decoders, comparators)
• Converting an arbitrary gate network to NAND-only or NOR-only form for manufacturing constraints
• Teaching or reviewing digital logic design from specification to schematic
• Preparing the combinational datapath components needed by build-sequential-circuit or simulate-cpu-architecture

Inputs

• Required: Functional specification -- one of: truth table, Boolean expression, verbal description of input/output behavior, or a standard block name (e.g., "4-bit ripple-carry adder")
• Required: Target gate library -- unrestricted (AND/OR/NOT), NAND-only, NOR-only, or a specific standard cell library
• Optional: Optimization goal -- minimize gate count, minimize propagation delay (critical path), or minimize fan-out
• Optional: Maximum fan-in constraint (e.g., 2-input gates only)
• Optional: Don't-care conditions for inputs that will never occur