jtag-swd
jtag-swd
Use when firmware extraction is needed but direct SPI flash reading is physically impossible (BGA chips, eMMC), or live debugging/execution flow control is required.
1. Interface identification
- Standard JTAG:
TCK,TMS,TDI,TDO,nTRST,nSRST,GND,VCC. - ARM SWD: Compact 2-wire alternative (
SWDIO,SWDCLK,GND,VCC). - Use tools like JTAGulator or JTAGenum on unknown pin headers to automatically scan for TDO responses without manual probing.
2. Electrical and target preflight
Before connecting, confirm the target's I/O voltage, probe voltage compatibility, supported transport (JTAG or SWD), pinout, and any required level shifting from the target and probe documentation. Do not assume VTref powers the target or has the same function on every probe; check that probe's manual before wiring or powering anything. See the OpenOCD adapter guidance.
For the original ESP32, use JTAG, not SWD. ESP-IDF v6.1 documents JTAG I/O on VDD_3P3_RTC (normally 3.3 V); ensure the adapter supports the target's I/O level. Do not generalize this pin, voltage, or transport note to other ESP32-family chips; check the exact device documentation. See ESP-IDF v6.1 JTAG debugging.
ESP-IDF v6.1 documents a configuration-dependent case where flash-encryption setup disables JTAG by burning the relevant eFuse on first boot. Check the project's flash-encryption configuration and actual eFuse state for the specific original ESP32 before expecting debug access; flash encryption alone is not evidence that this eFuse was burned. See ESP-IDF v6.1 flash encryption.