PCB component placement

Placement decides most of what routing can achieve. A part in the wrong place makes a track long, a current loop large, or a pad unreachable, and no routing fixes that later. Good placement gives every connection that carries fast-changing current a short, direct path, keeps a channel open for every other connection, and passes placement DRC (courtyards, clearance, board edge) with zero errors.

This skill is experimental. It was developed against a few small Nordic QFN benchmark boards and has not been qualified for electrical, RF or manufacturing sign-off. Its scripts check placement geometry under simple rules. Where their results and the datasheet or the vendor's reference layout disagree, follow the datasheet and the reference.

Save progress to the configured board

Resolve the canonical path from the project root's .backplane.json (project, or explicit pcb). After each meaningful group, save even unfinished placement to that exact file with SaveDocument or --save; do not leave progress only in the server or a final copy. Read back the saved path and show it with viewer_show, then verify the viewer and history refer to that saved file; report any mismatch. Preserve its <native-filename>.backplane.json companion. Keep backups/intermediates separate; validate any staging output and promote it back with a backup. One writer owns the canonical board; alternate files require an explicit experiment request.