Modeling and Simulating SerDes Systems

Design, analyze, and deliver high-speed serial link models using SerDes Toolbox. From architecture exploration through IBIS-AMI model generation, covers the full workflow for NRZ and PAM-N links (PAM3 through PAM16).

When to Use

System design and architecture exploration

• Designing SerDes links for a target data rate, signaling scheme (NRZ, PAM4, PAM-N), and channel loss
• Evaluating equalization architectures (FFE, CTLE, DFE) and optimizing tap settings
• Sweeping design parameters to find optimal configurations
• Using industry reference designs (PCIe, USB4, DDR5, CEI, UCIe) as starting points
• Characterizing Tx/Rx analog effects (parasitic capacitance, rise time, termination impedance)
• Building custom datapath blocks for nonstandard equalization