The Agent Skills Directory

[SAFE]: The skill serves as a technical reference for FPGA development. All analyzed files contain standard hardware description language (HDL) snippets, timing constraints, and educational documentation focused on clock domain crossing (CDC) and timing closure. No evidence of prompt injection, data exfiltration, or obfuscation was found. The validation rules in references/validations.md use standard regular expressions to identify common design mistakes like unintentional latch inference or missing synchronizers, without any malicious side effects.

fpga-design