CRG Design Generator (crg-design-gen)

Merged from crg-req-to-design + cr-tree-diag-gen.

Turn a CRG requirement table into clock/reset design tables, a PLL/architecture report, and a crg-gen-ready workbook. After review, turn design tables into Draw.io / Excalidraw topology diagrams.

This skill does not generate synthesizable CRG RTL.

Pipeline

需求表 (req)
  → crg_req_to_design          # stage 1：设计表 + PLL 报告 + crg workbook
  → [人工评审 design xlsx]
  → cr_tree_diag_gen           # stage 2：拓扑图
  → [可选] crg-gen             # 另一 skill：RTL/SDC

One-shot draft (unreviewed, exploration only):